> x86 CPUs do allow themselves to reorder reads around other reads. The rule is that no memory access is allowed to cross a write operation
That's not correct. Intel manual, vol 3, sec. 9.2.2:
> Reads are not reordered with other reads
> Writes are not reordered with older reads.
> Writes to memory are not reordered with other writes
A read may be reordered w.r.t. an older write (and hence tfa is incorrect that po=ppo on x86), but reads are not ordered with other reads. You can see in the c/c++ processor mappings here https://www.cl.cam.ac.uk/~pes20/cpp/cpp0xmappings.html that load acquire/store release can be mapped to plain loads and stores on x86.
That's not correct. Intel manual, vol 3, sec. 9.2.2:
> Reads are not reordered with other reads
> Writes are not reordered with older reads.
> Writes to memory are not reordered with other writes
A read may be reordered w.r.t. an older write (and hence tfa is incorrect that po=ppo on x86), but reads are not ordered with other reads. You can see in the c/c++ processor mappings here https://www.cl.cam.ac.uk/~pes20/cpp/cpp0xmappings.html that load acquire/store release can be mapped to plain loads and stores on x86.